With recent development of digital signal processing technologies, apparatus for recording and reproducing high-efficiency coded digital data of video signals etc., for example, digital video cassette tape-recorders (referred to hereinafter as DVC), have become generalized.
The present applicant hereof has previously proposed a method of recording and reproducing external input video signals such as composite signals, etc., in a recording and reproducing apparatus.
FIG. 8 shows the embodiment of the previously proposed recording and reproducing apparatus.
In this figure, 1 designates an I/O block(input/output processor), 2 a VSP (Video Signal Processing) block (compressing and expanding processor), 3 a DRP (Data Recording Playback) block (recording and reproducing processor), 4 a control block, 5 an input video signal processing circuit, 6 a shuffling memory, 7 an orthogonal transformation (data compression coding) circuit, 8 a framing circuit, 9 a PTG memory, 10 an encoder, 11 a decoder, 12 an ECC memory, 13 a deframing circuit, 14 an inverse orthogonal transformation (data expansion decoding) circuit, 15 an output video signal processing circuit, 16 a synchronization separator circuit, 17 a vertical and horizontal synchronization separator circuit, 18 an I/O PLL circuit, 19 a multiplexer, 20 an I/O control signal generator circuit, 21 a 13.5 MHz clock generator circuit, 22 4/1 PLL circuit, 23 a frequency divider, 24 a frame pulse generation counter, 25 a VSP control signal generator circuit, 26 a DRPPLL circuit, 27 a DRP control signal generator circuit, 28 an external input control circuit, 29 a phase comparator and 30 a data masking circuit.
This recording and reproducing apparatus is overall configured of I/O block 1 as an input/output portion for handling input and output of video signals, VSP block 2 for effecting predetermined processes on video data, a DRP block 3 for performing recording and reproducing processes for recording and reproducing video data and control block 4 for generating clock signals required for blocks 1 to 3 and controlling the whole apparatus.
Conventionally, during the playback mode in the recording and reproducing apparatus, the frequency of the frame pulse may fluctuate due to some causes. To deal with cases, a high-precision oscillator such as a crystal oscillator and the like has been used to provide a stable internal clock. That is, a stable reproduction is realized by using the frame pulses of a stable frequency generated based on the counts of the internal clock. However, for reception in the data communication using a digital interface conforming to the IEEE1394 standards (referred to hereinafter as 1394I/F), which has become prevalent recently, the data synchronously transmitted with the frame pulse from the transmitter side should be processed, so that the frame pulse inside the recording and reproducing apparatus as the receiver side needs to be locked with the frame pulse of the transmitter side. In this case, however, the frequency of the internal frame pulse is expected to fluctuate due to the phase difference between the frame pulse on the transmitter side immediately after the start of reception and the internal frame pulse or due to jitter of the frame pulse occurring when the source on the transmitter side is analog and a special playback is performed. Since a PLL circuit is used so as to always keep the number of clock pulses within one frame constant, if the frequency of the frame pulse fluctuates, jitter will occur in the pulse width of the system clock, which in turn will cause fluctuations in the monitor output picture or other turbulence. No particular consideration with regard to this point was given by the previously proposed recording and reproducing apparatus.
Further, other than there reasons, there is a possibility that the frame length of the frame pulse may vary due to noises etc., and due to synchronization fluctuations in the circuits. If the number of clock pulses in one frame fluctuates, the synchronism with the video data loses, causing disturbance in the output video data. The previously proposed recording and reproducing apparatus is not the one which gives a particular consideration to this problem.
The object of the present invention is to provide a recording and reproducing apparatus which, even when the synchronism of the frame pulse becomes turbulent, can output normal video data and always keeps the output video data in synchronism and the clock frequency stable.